======  Regular meeting on 2017.11.22 ======
\\

===== Preliminary agenda =====

 General points in Wiki's dashboard:
  - Upcoming Tests - Planning
  - Results from Recent Tests - Analyzing/discussing
  - Common Test Infrastructure - Building
  - Other Activities & Resources

===== MoM =====

==== 1.  Attendees  ====

-- Alberto Moreno (Tesat Spacecom, Airbus DS) \\
-- Barrie Timpe (Xilinx FAE) \\
-- Dan Elftmann (Xilinx) \\
-- David Lee (Sandia Labs) \\
-- Gary Swift (meeting moderator, Swift ERS) \\
-- Hagen Schmidt (Airbus DS, Germany) \\
-- Jim Devereaux (Xilinx FAE) \\
-- Philip Chang  (RUAG) \\
-- Ron Smith (Northrop Grumman) \\
-- Scott Arlo Anderson (SEAKR) \\
-- Sebastian Garcia (Slabs) \\
-- Steve Pearl (General Dynamics) \\
-- TAS-E (Thales-Alenia Space, España) team (Diana) \\
-- Victor Liau (Hughes Network Systems) \\

==== 2.  Topics covered ====

//NOTE: The following are very brief descriptions. Being this a Wiki, please complete/expand/correct them if you think we are missing interesting information (especially regarding anything important for future reference). 
//

Gary: New JPL website, can't find radiation ("5144") group pages, so putting the pointers to the XRTC documents in this Wiki's public page.

Hagen Schmidt presents himself to the XRTC.

Gary comments that, after Dan Elftmann's "fork" announcement last Friday, now the priority should be testing the Kintex UltraScale. 

Gary comments on next-gen test infrastructure: still looking for commitments from XRTC members, to achieve critical mass, to finish the NRE and order the motherboard. JPL and others are already supporting the effort.

Philip requests more data on the ZUS+ latchup issue: Is it destructive?, etc. \\
Gary, Dan: More details are available through the usual channel for each organization, signing an NDA.

Sebastian mentions he is interested in the possibility to push, from the XRTC, latchup supression oriented test activities for the Zynq-US+. \\
That is, in summary:  Zynq-US+ DUT board development and manufacturing, neutron/proton or heavy-ion (the latter involving DUT delidding/thinning/thickness_measuring) irradiation for producing DD with minority carrier lifetime degradation (bulk), and finally beam testing towards SEL characterization. 

Dan comments on performing a survey, targeted to Space developers, for selecting the features to put on board on the Kintex UltraScale development platform. That is, a functional platform, populated with a commercial device compatible with the "rad-tolerant" one to come in ~2020.

Alberto asks for the possibility for Xilinx to produce a Zynq UltraScale 20nm device. I.e., an UltraScale chip including microprocessors. \\
Dan: This possibility is not being considered at this time. 




